In recent years, new or more stringent demands have been imposed on lighting systems, such as increased requirements for energy conservation, and the need to accommodate an increasing variety of different types of lighting units which employ different types of light sources (e.g., incandescent, fluorescent, light emitting diode, etc.) with different driving requirements, with different types of lighting units often being deployed within a same building or even the same room. These demands have driven needs for more options and flexibility in the control of the lighting units within a facility. These needs, in turn, have led to the development and installation of lighting networks within many facilities.
In particular, the lighting industry has developed the Digital Addressable Lighting Interface (DALI) standard for digital communications between the individual components of a lighting system which are connected in a lighting network. A DALI network may include one or more DALI control devices and one or more DALI slave devices. A wide variety of different DALI devices from different manufacturers can be connected together and integrated into a lighting system. This provides a high level of flexibility in configuring a lighting system while being assured of interoperability between all of the devices. Control and address capabilities allow a DALI compliant lighting system to individually control the light level of each of the luminaries as well as easily controlling light levels for groups of luminaries.
A group of DALI devices may be connected together via a two-wire differential control/data bus referred to as a DALI bus (which may sometimes also be referred to as a DALI loop or DALI network). DALI messages communicated between DALI devices via the DALI bus are serial data streams and comply with a bi-phase coding, Manchester IEEE 802.3, in which the bit transitions occur between two states or voltage levels, which are typically 16 volts (H) and 0 volts (L). Each DALI device includes a corresponding DALI interface for connecting the device to the DALI bus. To maintain interoperability between different DALI devices from different manufacturers, the DALI standard imposes requirements on the DALI interfaces of DALI control devices and DALI slave devices to ensure DALI device compatibility.
FIG. 1 illustrates the voltage range relationships for the differential two-wire line (a “line-pair”) of a DALI bus.
Each DALI device receives information by determining the voltage changes of a received signal on the DALI bus representing the bit values of the serial data stream, and transmits information by either not clamping or clamping (shorting) the voltage across the two-wire DALI bus. A power source is usually incorporated in the master controller for the DALI bus, providing the necessary voltage level on the DALI bus.
A DALI interface conditions a received signal from the DALI bus and conveys a corresponding binary digital signal to one or more components that use the binary digital signal (e.g., a microcontroller (MCU) that also performs the necessary decoding of the binary digital signal) via a galvanic isolation means that provides a required galvanic isolation between the DALI bus and the MCU.
For optimal decoding, it is desirable to have the duty cycle of a binary digital signal output by a DALI interface to be as close as possible to 50% when it reaches the MCU or other decoder, to ensure that the serial data conveyed by the binary digital signal is accurately decoded and detected in the presence of noise. However, the DALI standard (IEC 62386-101) only imposes limits on the rise and fall transition times as well as the duty cycle (i.e., low and high durations) of the signal present on the DALI bus, and it is left to the DALI interface to make sure that the duty cycle of the signal that is provided to the input of the MCU/decoder is not overly distorted by one or more components of the DALI interface.
To address these requirements, several different communication interface circuits have been developed. In particular, examples of DALI interface circuits are disclosed in: U.S. Patent Application Publication 2004/0225811; U.S. Patent Application Publication 2005/0152439; U.S. Patent Application Publication 2008/0143402; and U.S. Patent Application Publication 2009/0003417.
However, each of these communication interface circuits has certain disadvantages or limitations pertaining to complexity, cost, and/or performance.
Thus, it would be desirable to provide a communication interface circuit which can provide flexible control of the duty cycle and which can maintain a duty cycle of a received signal to be within a specified range, as tight as possible around the ideal 50% value, while taking into account variations in the specified performance of electrical components of the interface circuit. It would further be desirable to provide such a communication interface circuit which can provide flexible control of the rise and fall times of the edge transitions of a signal received from a DALI bus.